I wanted to try something related to Cactus development… something I’m surprised I didn’t try sooner: breadboarding Grant Searle’s minimal 6502 machine design. It took some time to get the EPROM, serial, and stuck data line business sorted out, but as you can see I’m programming in BASIC on that breadboarded machine.
I’m programming in BASIC on a machine I assembled. That’s not sinking in quite yet for me.
I got some new Western Design Center CMOS 65C02S’s in the mail, which have some fun features and functionality improvements over the old MOS NMOS 6502′s. They have a fully static core, meaning that losing memory while halted or while single-stepping is now no longer a concern. They added a Bus Enable pin which allows you to put the address and data buses into a high-Z state (which eliminates my need for 74245 bus transceivers, and thus associated wiring). Plus, these things can be clocked up to 14MHz! Holy fuck!
I’ve got additional EPROMs, ACIA’s, and other components in the mail too. I received some spare RAM already, along with those 65C02′s, both of which are in this… Cactus seed on display here. I’m also testing a clock frequency divider which is helping the 6850 UART generate 9600 baud for the serial connection, as well as 1.2MHz for the CPU.